1. Field of the Invention
The present invention relates to processor registers. In one example, the present invention relates to methods and apparatus for providing state information in processor registers to allow the implementation of a more efficient processor.
2. Description of the Prior Art
Electronic devices such as processors have datapaths for handling input and providing output. For example, a processor may have a datapath such as a reduced instruction set computing (RISC) datapath. The supported datapath may be associated with taking an instruction, performing an operation on input values, and providing resulting output values. Processors typically include control circuitry, an arithmetic logic unit (ALU), and memory (e.g. registers, cache, RAM and ROM) for processing instructions.
Elements on the processor datapath typically have a designated width. For example, a 16-bit ALU may be coupled to 16-bit registers. The 16-bit ALU is operable to take data from 16-bit registers and write the result to another 16-bit register. However, certain computations yield results that can not be fully expressed in a 16-bit output. Consequently, additional mechanisms are often provided in order to handle results that can not be fully expressed. The additional mechanisms, however, can be complex and inefficient.
In some instances, providing registers for holding overflow information or carry information can consume valuable chip resources. It is therefore desirable to provide improved methods and apparatus for implementing electronic devices such as processors. More specifically, it is desirable to provide improved techniques and mechanisms for implementing processor pipelines with more efficient mechanisms for handling state information.